Semiconductor materials (e.g., polysilicon) are used to form electrical conduits, or channels in a variety of electronic devices, for example, devices that employ complimentary metal-oxide-semiconductor (CMOS) materials. CMOS technology is used in numerous electronic devices and components, including microprocessors, microcontrollers, computer memory, and digital logic circuits.
Various computer memory types, such as static random access memory (SRAM) and flash memory (e.g., NOR, NAND, and charge trap), utilize CMOS materials and have architecture that electrically couples a source line to an array of memory cells. Typically, memory cells in flash memory arrays are arranged such that a control gate of each memory cell in a row of the array is connected to form an access line, such as a word line. Columns of the array include strings of memory cells connected source to drain, between a pair of select lines, a source select line and a drain select line.
Flash memory arrays may be in two-dimensional configurations or three-dimensional (3D) configurations (e.g., stacked memory arrays including pillars of stacked memory elements, such as vertical NAND strings). The source select line includes a source select gate at each intersection between a memory cell string and the source select line, and the drain select line includes a drain select gate at each intersection between a memory cell string and the drain select line. Each source select gate is connected to a source line, while each drain select gate is connected to a data line, such as a column bit line. Typically, the source line and the data line are formed of polysilicon and the memory cells are connected via a polysilicon channel, which is electrically coupled to the source and data lines.
Reference will now be made to the exemplary embodiments illustrated, and specific language will be used herein to describe the same. It will nevertheless be understood that no limitation of the disclosure scope or to specific invention embodiments is thereby intended.